<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" href="../../assets/xml/rss.xsl" media="all"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Dzu's Blog (Einträge über imx8)</title><link>https://blog.lazy-evaluation.net/</link><description></description><atom:link href="https://blog.lazy-evaluation.net/de/categories/imx8.xml" rel="self" type="application/rss+xml"></atom:link><language>de</language><copyright>Contents © 2025 &lt;a href="mailto:dzu@member.fsf.org"&gt;Detlev Zundel&lt;/a&gt; </copyright><lastBuildDate>Wed, 10 Dec 2025 16:11:14 GMT</lastBuildDate><generator>Nikola (getnikola.com)</generator><docs>http://blogs.law.harvard.edu/tech/rss</docs><item><title>Using OpenOCD with the M4 MCU on the i.MX8M Mini</title><link>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-openocd.html?pk_campaign=feed</link><dc:creator>Detlev Zundel</dc:creator><description>&lt;div&gt;&lt;div class="imageblock" id="org0eb3fb5"&gt;

&lt;div id="org9125958" class="figure"&gt;
&lt;p&gt;&lt;img src="https://blog.lazy-evaluation.net/de/images/giant-gd1d82756c_640.jpg" alt="giant-gd1d82756c_640.jpg" title="Big and Little" align="middle" width="150"&gt;
&lt;/p&gt;
&lt;/div&gt;

&lt;/div&gt;

&lt;p&gt;
Over the last few years, SoCs targeted at embedded GNU/Linux
applications became heterogenous architectures.  Instead of
adding more identical copies of CPU cores (Cortex-A class), a small
companion micro controller core (Cortex-M class) was added.  Compared
to the complex architecture of Cortex-A systems, including their
multi-layer caches, those cores are usually deterministic and thus
predestined for low-latency "real time" jobs.  NXP's first such SoC is
the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-6-processors/i-mx-6solox-processors-heterogeneous-processing-with-arm-cortex-a9-and-cortex-m4-cores:i.MX6SX"&gt;i.MX6 Solo X&lt;/a&gt; device featuring an Cortex-M4 next to an Cortex-A9
core.  The &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors:IMX8-SERIES"&gt;i.MX8 family&lt;/a&gt; moved the Cortex-A cores into the 64 bit world
and there are different combinations of Cortex-M companion micro
controllers, but all of them do feature them as they are pretty
"cheap" in terms of die space and transistor count.
&lt;/p&gt;

&lt;p&gt;
From what I can see, it is still uncommon to use those micro
controllers in actual projects though.  Today I want to take a short
look on how to run simple programs on the Cortex-M4 of the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI"&gt;i.MX8M Mini&lt;/a&gt;
SoC, especially we will use the official &lt;a href="https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i-mx-8m-mini-applications-processor:8MMINILPD4-EVK"&gt;i.MX8M Mini EVK&lt;/a&gt;.
&lt;/p&gt;

&lt;p&gt;&lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-openocd.html?pk_campaign=feed"&gt;Weiterlesen…&lt;/a&gt; (2 min verbleiben zum Lesen)&lt;/p&gt;&lt;/div&gt;</description><guid>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-openocd.html</guid><pubDate>Tue, 01 Apr 2025 17:01:30 GMT</pubDate></item><item><title>More AMP on the i.MX8M Mini with Rpmsg</title><link>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-simple-rpmsg-2.html?pk_campaign=feed</link><dc:creator>Detlev Zundel</dc:creator><description>&lt;div&gt;&lt;div style="text-align:center" class="imageblock" id="orgcd80677"&gt;

&lt;div id="orgae5d2e8" class="figure"&gt;
&lt;p&gt;&lt;img src="https://blog.lazy-evaluation.net/de/images/giant-gd1d82756c_640.jpg" alt="giant-gd1d82756c_640.jpg" title="Big and Little" align="middle" width="150"&gt;
&lt;/p&gt;
&lt;/div&gt;

&lt;/div&gt;

&lt;p&gt;
In a recent post, I described the basics to execute code on the Cortex
M4 micro controller inside the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI"&gt;i.MX8M Mini&lt;/a&gt; SoC.  However there was no
communication going on between Linux on the Cortex A cores and the
application running on the M4.  In this post, I will look at an
example using the &lt;a href="https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/staging/remoteproc.rst?h=lf-5.10.y"&gt;remoteproc&lt;/a&gt; and &lt;a href="https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/staging/rpmsg.rst?h=lf-5.10.y"&gt;rpmsg&lt;/a&gt; (Remote Processor Messaging)
frameworks for communication between the processors.  The remoteproc
subsystem implements basic house keeping for co-processors in Linux
and the rpmsg framework implements the actual data channels.
&lt;/p&gt;

&lt;p&gt;&lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-simple-rpmsg-2.html?pk_campaign=feed"&gt;Weiterlesen…&lt;/a&gt; (2 min verbleiben zum Lesen)&lt;/p&gt;&lt;/div&gt;</description><guid>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-simple-rpmsg-2.html</guid><pubDate>Tue, 01 Apr 2025 12:48:52 GMT</pubDate></item><item><title>Exploring the U-Boot boot scripts on i.MX8M Mini EVK</title><link>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-bootscripts.html?pk_campaign=feed</link><dc:creator>Detlev Zundel</dc:creator><description>&lt;div&gt;&lt;div style="text-align:center" class="imageblock" id="org39fc427"&gt;

&lt;div id="orgf05758c" class="figure"&gt;
&lt;p&gt;&lt;img src="https://blog.lazy-evaluation.net/de/images/giant-gd1d82756c_640.jpg" alt="giant-gd1d82756c_640.jpg" title="Big and Little" align="middle" width="150"&gt;
&lt;/p&gt;
&lt;/div&gt;

&lt;/div&gt;

&lt;p&gt;
As I used the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI"&gt;i.MX8M Mini&lt;/a&gt; SoC in previous blog posts, I decided to
explain the "magic" going on with the default boot settings in
U-Boot.  Understanding this gives us a solid foundation to efficiently
work with the eval board during early development.
&lt;/p&gt;

&lt;p&gt;
Of course it is also possible to reuse the framework for your own
embedded Linux project, so it is even more important to understand the
functional implications of it.
&lt;/p&gt;

&lt;p&gt;&lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-bootscripts.html?pk_campaign=feed"&gt;Weiterlesen…&lt;/a&gt; (4 min verbleiben zum Lesen)&lt;/p&gt;&lt;/div&gt;</description><guid>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-bootscripts.html</guid><pubDate>Tue, 01 Apr 2025 09:01:30 GMT</pubDate></item><item><title>Basic AMP on the i.MX8M Mini with Rpmsg</title><link>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-simple-rpmsg.html?pk_campaign=feed</link><dc:creator>Detlev Zundel</dc:creator><description>&lt;div&gt;&lt;div style="text-align:center" class="imageblock" id="orgceb756a"&gt;

&lt;div id="org36e6903" class="figure"&gt;
&lt;p&gt;&lt;img src="https://blog.lazy-evaluation.net/de/images/giant-gd1d82756c_640.jpg" alt="giant-gd1d82756c_640.jpg" title="Big and Little" align="middle" width="150"&gt;
&lt;/p&gt;
&lt;/div&gt;

&lt;/div&gt;

&lt;p&gt;
In a &lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-intro.html"&gt;recent post&lt;/a&gt;, I described the basics to execute code on the Cortex
M4 micro controller inside the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI"&gt;i.MX8M Mini&lt;/a&gt; SoC.  However there was no
communication going on between Linux on the Cortex A cores and the
application running on the M4.  In this post, I will look at an
example using the &lt;a href="https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/staging/remoteproc.rst?h=lf-5.10.y"&gt;remoteproc&lt;/a&gt; and &lt;a href="https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/staging/rpmsg.rst?h=lf-5.10.y"&gt;rpmsg&lt;/a&gt; (Remote Processor Messaging)
frameworks for communication between the processors.  The remoteproc
subsystem implements basic house keeping for co-processors in Linux
and the rpmsg framework implements the actual data channels.
&lt;/p&gt;

&lt;p&gt;&lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-simple-rpmsg.html?pk_campaign=feed"&gt;Weiterlesen…&lt;/a&gt; (13 min verbleiben zum Lesen)&lt;/p&gt;&lt;/div&gt;</description><guid>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-simple-rpmsg.html</guid><pubDate>Sat, 16 Apr 2022 12:48:52 GMT</pubDate></item><item><title>Using the M4 MCU on the i.MX8M Mini</title><link>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-intro.html?pk_campaign=feed</link><dc:creator>Detlev Zundel</dc:creator><description>&lt;div&gt;&lt;div style="text-align:center" class="imageblock" id="orgfb85353"&gt;

&lt;div id="orgd5f0915" class="figure"&gt;
&lt;p&gt;&lt;img src="https://blog.lazy-evaluation.net/de/images/giant-gd1d82756c_640.jpg" alt="giant-gd1d82756c_640.jpg" title="Big and Little" align="middle" width="150"&gt;
&lt;/p&gt;
&lt;/div&gt;

&lt;/div&gt;

&lt;p&gt;
Over the last few years, SoCs targeted at embedded GNU/Linux
applications became heterogenous architectures.  Instead of
adding more identical copies of CPU cores (Cortex-A class), a small
companion micro controller core (Cortex-M class) was added.  Compared
to the complex architecture of Cortex-A systems, including their
multi-layer caches, those cores are usually deterministic and thus
predestined for low-latency "real time" jobs.  NXP's first such SoC is
the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-6-processors/i-mx-6solox-processors-heterogeneous-processing-with-arm-cortex-a9-and-cortex-m4-cores:i.MX6SX"&gt;i.MX6 Solo X&lt;/a&gt; device featuring an Cortex-M4 next to an Cortex-A9
core.  The &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors:IMX8-SERIES"&gt;i.MX8 family&lt;/a&gt; moved the Cortex-A cores into the 64 bit world
and there are different combinations of Cortex-M companion micro
controllers, but all of them do feature them as they are pretty
"cheap" in terms of die space and transistor count.
&lt;/p&gt;

&lt;p&gt;
From what I can see, it is still uncommon to use those micro
controllers in actual projects though.  Today I want to take a short
look on how to run simple programs on the Cortex-M4 of the &lt;a href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI"&gt;i.MX8M Mini&lt;/a&gt;
SoC, especially we will use the official &lt;a href="https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i-mx-8m-mini-applications-processor:8MMINILPD4-EVK"&gt;i.MX8M Mini EVK&lt;/a&gt;.
&lt;/p&gt;

&lt;p&gt;&lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-intro.html?pk_campaign=feed"&gt;Weiterlesen…&lt;/a&gt; (21 min verbleiben zum Lesen)&lt;/p&gt;&lt;/div&gt;</description><guid>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-evk-m4-intro.html</guid><pubDate>Mon, 11 Apr 2022 17:01:30 GMT</pubDate></item><item><title>Testing Preempt RT on the i.MX8MM SoC in 15 minutes</title><link>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-rt-preempt.html?pk_campaign=feed</link><dc:creator>Detlev Zundel</dc:creator><description>&lt;div&gt;&lt;div style="text-align:center" class="imageblock" id="orgd640676"&gt;

&lt;div id="org0c41ceb" class="figure"&gt;
&lt;p&gt;&lt;img src="https://blog.lazy-evaluation.net/de/images/preempt-rt-logo.png" alt="preempt-rt-logo.png" title="Linux Preempt RT Logo" align="middle"&gt;
&lt;/p&gt;
&lt;/div&gt;

&lt;/div&gt;

&lt;p&gt;
Looking at the kernel sources for NXP's i.MX8M SoCs, I noticed
branch names like "lf-5.10.72-rt-2.2.0" and I wondered if NXP finally
was going to offer RT preempt support within their BSP.  Some 
other vendors have started supporting the patch set already a while
ago but for NXP this is new.
&lt;/p&gt;

&lt;p&gt;
In this post we are going to run this real-time enabled kernel on the
i.MX8M-Mini evaluation board from NXP to get a first hand impression
of what is required on the kernel level.  We will not use the Yocto
build system as this is only a wrapper around the distribution
agnostic kernel development.
&lt;/p&gt;

&lt;p&gt;&lt;a href="https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-rt-preempt.html?pk_campaign=feed"&gt;Weiterlesen…&lt;/a&gt; (8 min verbleiben zum Lesen)&lt;/p&gt;&lt;/div&gt;</description><guid>https://blog.lazy-evaluation.net/de/posts/embedded/imx8mm-rt-preempt.html</guid><pubDate>Wed, 23 Feb 2022 20:34:30 GMT</pubDate></item></channel></rss>